Conventional bi-directional buffers suffer from severe signal glitches due to feedback caused by a signal circling the loop from the first input/output (I/O) terminal to the second I/O terminal and back from the second I/O terminal to the first I/O terminal, and vise versa from the second I/O terminal to the first I/O terminal and back from the first I/O terminal to the second I/O terminal. It would be beneficial to reduce, and preferably eliminate, such signal glitches that are due to feedback.